A high speed RLCG circuit interconnects has
become faultless and has suited essential to address signal
integrity. For faultless representation a full wave exploration
is required. Typically circuit simulation of RLC interconnect
CPU is lavish. This paper discusses RLCG full wave
exploration using frequency shift techniques. The results
shown are efficient. It can also be done by Fourier series
analysis. A logical interconnects representation is introduce
based on Fourier series exploration satisfactory for periodic
signal such as clock signal. In this representation, the far end
time domain zone waveform is estimates by the super-impose
of various sinusoids. The fifth and the higher harmonics are
ignored when closed form response of the 50% lag. The
representation is applied to the various allocated coupled
interconnect and interconnected trees. Good exactness is
detecting intermediately within the SPICE and model
simulation. The computation complication of the
representation is linear with the number of harmonics.
Published In:IJCSN Journal Volume 5, Issue 4
Date of Publication : August 2016
Pages : 578-584
Figures :12
Tables : 02
Pratiksha Singh Gaur : passed B.Tech degree in Electronics and
Communication engineering form college of science, and
engineering Jhansi, U.P, Uttar Pradesh technical university luck
now. She has published 5 papers in International Journal and
publishes 3 papers in national seminar. She has completed
M.Tech from Amity University, Gwalior.
Vivek Singh Kushwah : received his B.E. degree from Institute of
Technology and Management, Rajiv Gandhi Technical University,
India in 2005 and M.Tech. degree from Madhav Institute of
Technology and Science, Rajiv Gandhi Technical University, India
in 2007 respectively. He is now working as an Assistant Professor
in the Electronics and Communication Engineering Department,
Amity School of Engineering and Technology, Amity University
Gwalior, M.P., India since 2011. He has more than 9 years of
teaching experience in academics He has completed his Ph.D.
work in Microwave Filters from Rajiv Gandhi Technical University,
India. He has published more than 30 research papers in various
reputed international and national journals and conferences. His
areas of interests include Artificial Neural Networks, Microstrip
Antenna, R.F. and Microwave Filters etc.
Fourier series, Crosstalk, Frequency Shift
Technique, RLCG Interconnect, VLSI
The proposed method can be extended to different
operating frequencies by incorporating digitally tunable
matching capacitances. Hence we explored VLSI
interconnect based on frequency shift technique by which
a new model order technique is proposed. The proposed
method relies on the poles and residues of a transfer
function whether exact or approximate and can thus be
used in any kind of model order reduction technique.
Simulation results show that the technique gives almost all
same results as original circuit, while the stability of the
original system preserved. Hence, by manipulating a
Fourier series representation of typical on-chip signal, an
scientific time-domain solution for an RLCG annex is
shown to be an effective modeling strategy. We conclude
that the exploration can be done in s-domain using
algebraic formula, instead of improper integration in the
time domain.
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