Steganography is one of the most influential
techniques to mask the presence of concealed secret
information inside a cover image. Image steganography is
the important technique as digital image files are the most
significant cover objects for steganography. Various
algorithms and techniques such as LSB Replacement and
Discrete Wavelet Transform are used for processing the
secret data. Results are obtained in terms of PSNR, MSE
and BER design metrics for proposed system. Intensive
computations are required for embedding secret
information inside images, and thus designing
steganography in hardware speeds up steganography. The
design when implemented with FPGA Spartan 3A kit
provides a least processing time, which might give a faster,
programmable & commercial hardware solution for secure
communication. Proposed algorithms produces PSNR
between 42-46 dB for LSB and 49-55 dB for DWT.
Kalpana Shete : Dept. of Electronics, BVUCOE,
Pune, Maharashtra, India
Mangal Patil : Dept. of Electronics, BVUCOE,
Pune, Maharashtra, India
J. S. Morbale : Dept. of Electronics, BVUCOE,
Pune, Maharashtra, India
Image Steganography
Discrete Wavelet
Transform
FPGA
Least Significant Bit
In this paper the performance of image steganography is
evaluated based on various metrics such as PSNR, MSE,
BER and processing time. The proposed LSB replacement
and DWT technique provides high PSNR and less MSE
and BER values than previous methods. Proposed LSB
algorithm produces PSNR in the range of 42-46 dB
whereas DWT generates PSNR between 49-55dB. Spartan
3A development kit produces better performance in terms
of processing time for same LSB and DWT algorithms.
Future work should focus on hardware implementation
based on various spatial and transform domain techniques
to improve the robustness and image quality performance
further, as well as minimizing the processing speed and
power.
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