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  Design and Implementation of Four Level Asynchronous Counter Using D-Flipflop  
  Authors : Dr. Gajanan Sarate; Prashant Wankhade
  Cite as:

 

A quaternary asynchronous counter is proposed using D-flip-flop, here D-flip is used as a basic building block for the design of counter a mod-16 asynchronous counter using D-flip-flop is presented in this paper. Quaternary multiplexer and Flip-flop are used to design quaternary asynchronous counter. In this paper binary Dflip- flop compared with quaternary D-Flip-flop and simulation of quaternary circuit done using H-spice software. Performance evolution of Proposed D-flip-flop is compare with existing flip-flop with optimization of power and delay. The proposed asynchronous counter has less power dissipation and propagation delay.

 

Published In : IJCSN Journal Volume 5, Issue 6

Date of Publication : December 2016

Pages : 878-884

Figures :08

Tables : 06

 

Dr. Gajanan Sarate : working as lecturer in government polytechnic amravati.

Prashant Wankhade : working as assistant professor at datta meghe college of engineering airoli ,navi Mumbai.

 

 

 

 

 

 

 

Multiple Value Logic (MVL), Quaternary Logic, MVL Counters,. Sequential Circuit

Flip-flop used here are storage devise in designing of multiple value sequential circuit. . In this paper, quaternary D flip-flop with preset and clear is designed this quaternary D flip-flop is compared to previously designed binary and multi-valued D flip-flops. Proposed D flip-flop is better than all other flip-flops reported so far except propagation delay. Propagation delay is slightly higher in our flip-flop. But power dissipation is 64.33% less than at of DLC based D flip-flop and Q-IDEN D flip-flop. 2 bit ary counter can count only up to 4 counts, where as 2 bit quaternary counter can count up to 16. Multiple valued counters are simple dividers that are basic components in most digital systems and can generate a multiple-valued output. 2 bit quaternary counter dissipates 24.705 µW of dynamic power. D flipflop reported in this paper is useful for designing many low power sequential circuits such as counters, shift registers and state machines.

 

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