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  Design of Digital Circuit for Low Power Communication Centric RF Transceiver in Wireless Sensor Node using VHDL  
  Authors : Sanjay S.Khonde; Dr.Ashok A. Ghatol; Dr.Sanjay V.Dudul
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In wireless technology machines are talking with machines. The sensors have batteries as power backup. There is a serious issue of maintenance of these batteries and exchange of batteries, so there is a need of such a wireless sensor node which will consume very less power without affecting the functionality like speed, range and standard compliance. The power breakdown of wireless sensor node shows that the hungriest part is RF transceiver chip. So total power consumed by the sensor node can be reduced by reducing the power consumed by RF transceiver. The common solution is to activate the transceiver by changing the duty cycle. The duty cycle change is not correct solution because it has some drawbacks. So the possible solution to solve the issue is designing a digital control circuit which will activate the main radio after listening to channel and generating a interrupt as and when required. This on demand communication mechanism will reduce power wastage. The architecture of sensor node is to be modified to communication centric approach rather than traditional approach. The digital control circuit will wake up the transceiver as and when correct message will arrive at the input. The data packet is to be defined for the same. The digital circuit is using 2.4 GHz operating frequency. The power supply used is 1.8 V – 2.1 V. The circuit consists of analog front end comprising of LNA which amplifies the signal, a detector which detects the signal and decoder which retrieves the original signal from packet that arrives. Once the signal is decoded it goes to digital control block which is the main block of the circuit. The implementation is carried out in VHDL and program is run in Xilinx 14.7 software .A test bench is written in Verilog for simulation purpose. The simulation is carried in Isim software available in Xilinx 14.7 .The simulation of the code shows that the time required to write and read the data parameters is 16.4 uSec. Accordingly the performance analysis is carried out. First power consumption of CC2500 RF transceiver without digital control circuit is calculated. In active mode it comes out to be 20 uWatt. Then when the digital control circuit is present the power consumption of same RF transceiver is calculated, it comes out to be 0.034 pWatt. This shows that with the help of digital control circuit the power consumption is very less as compared to without digital circuit. The rest of the paper consists of System overview, experimental results, performance analysis and conclusion.


Published In : IJCSN Journal Volume 6, Issue 5

Date of Publication : October2017

Pages : 615-624

Figures :12

Tables : 01


Sanjay S. Khonde : is Research scholar at Sant Gadge Baba Amravati University, Amravati. He has Completed his BE (E&TC) and ME (Electronics) from Govt. College of Engg.Aurangabad, He is Pursuing his PhD in Electronics. He has total 22 years of experience in teaching as well as Industry.

Dr. Ashok A Ghatol : had his schooling at Amravati, B.E. (Electrical Engineering) from Nagpur University, and M.Tech. Electrical with specialisation in Electron Devices Technology, Ph.D. Electrical from IIT Powai, Bombay. He was Principal of Govt. C.O.E. Amravati for 6 years and 6 months; and then Principal of C.O.E.P. Pune for the period 2001 to 2005. He was the Vice Chancellor of Dr. Babasaheb Ambedkar Technological University, Lonere, Maharashtra. He is the Best Teacher awardee of Govt. of Maharashtra for the year 1999. He has guided 36 M.Tech projects and 25 Ph.D. students of Sant Gadge Baba Amravati University, Savitribai Phule, Pune University, and Babasaheb Ambedkar Technical University (B.A, T, U.), Lonere

Dr.Sanjay V Dudul : is Professor and Head, Department of Electronics, Sant Gadge Baba Amravati University, Amravati. His research area includes Artificial Intelligence, VLSI, embedded systems, data mining and many more. He has 6 patents published. He got Eminent Engineer Award in 2005 and Marquis Who’s Who Award (USA 2014).He has guided 13 PhD students of Sant Gadge Baba Amravati University.


RF, Wireless Sensor Node, Power Consumption, VHDL, Simulation

The paper propose the communication centric approach rather than conventional approach for the architecture of WSN. In the development of new RF transceiver a digital control circuit is designed which enables the wake up of main radio only when specific messages is sent. The power consumption of such system should be well below the power consumption of main radio and must wake it up while avoiding false alarm and missed messages. The digital control circuit consists of a front end consisting of LNA, detector and a decoder. The digital control block consists of initialization block, decoder block, parameter data block and clock division block .The wake up message is designed consisting of start sequence (8 bits ) .node address( 8 bits ) , Application Id( 26 bits ) and Channel Id ( 12 bits ).


[1] Feng Zhao, Leonidas Guibas, “Wireless Sensor Networks- An Information processing Approach”, Morgam Kaufmann Publishers-An imprint of Elsevier, pp 63-101 [2] Ajay V.Deshmukh “Micro controllers- Theory and Applications” Tata McGraw-Hill Companies, New Delhi, pp 115-202. [3] E.-Y. Lin, J. Rabaey and A. Wolisz, “Power-efficient rendez-vous schemes for dense wireless sensor networks”, in IEEE ICC, Paris, 20–24 June 2004 pp 3769-3776 [4] Raja Jurdak, Member, IEEE, Antonio G. Ruzzelli, and Gregory M.P. O’Hare, “Radio Sleep Mode Optimization in Wireless Sensor Networks,” IEEE TRANSACTIONS ON MOBILE COMPUTING, VOL. 9, NO. 7, JULY 2010, pp 955-968 [5] Denis C. Daly, Student Member, IEEE, and Anantha P. Chandrakasan, Fellow, IEEE,” An Energy-Efficient OOK Transceiver for Wireless Sensor Networks”, IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 42, NO. 5, MAY 2007, pp 1003-1011 [6] James Mathews, Matthew Barnes, Alex Young and D. K. Arvind,” Low Power Wake-Up in Wireless Sensor Networks using Free Space Optical Communications”, Feb 2010 IEEE 2010 Fourth International Conference on Sensor Technologies and Applications,pp 256-261 [7] Qizheng Gu,” RF SYSTEM DESIGN OF TRANSCEIVERS FOR WIRELESS COMMUNICATIONS”,Springer pp 114-198 [8] Michel C. Jeruchim, Philip Balaban, K. Sam Shanmugan,” Simulation of Communication Systems, Modeling, Methodology, and Techniques,Second Edition, KLUWER ACADEMIC PUBLISHERS NEW YORK, BOSTON, DORDRECHT, LONDON, MOSCOW,pp 14-45 [9] Xiongchuan Huang, Pieter Harpe, Guido Dolmans, Harmke de Groot,” A 915MHz Ultra-Low Power Wake- Up Receiver with Scalable Performance and Power Consumption,”IEEE 2011, pp 543-546 [10] Nikita patel, Neetu kumari, Satyajit Anand and Partha Pratim Bhattacharya,” A Brief Review on Low Power Wake-Up Receiver for WSN”, International Journal of Innovative Research in Computer and Communication Engineering, Vol. 1, Issue 9, November 2013,pp2035- 2041 [11] Pons Jean-Franc¸ois , Brault Jean-Jules ,Savaria Yvon,” Modeling, design and implementation of a low-power FPGA based asynchronous wake-up receiver for wireless applications”, Analog Integr Circ.Sig Process (2013) Springer ,pp 169-182, [12] Macro Spinola Durante, Stefan Mahlknecht,” An Ultra low power Wakeup Receiver for Wireless Sensor Nodes”, 3rd International Conference on Sensor Technologies and Applications, Sept 2009, IEEE Computer Society ,pp167- 170 [13] Nathan M. Pletcher, Simone Gambini, Jan Rabaey,” A 52 uW Wake up Receiver with -72 dBm Sensitivity Using an Uncertain –IF Architecture , IEEE Journal of Solid State Circuits Vol 44, No 1,Jan2009,pp 269-280 [14] Carl Bryant, Henrik Sjoland,” A 2.45 GHz, 50 uW Wake up Receiver Front end with -88dBm Sensitivity and 250 kbps Data Rate “, IEEE Aug 2014 ,pp235-238 [15] Chandra Shekhar, Shirshu Varma, M. Radhakrishna , “A 2.4GHz Pasive Wake Up Circuit for Power Minimization in Wireless Sensor Nodes”, IEEE May 2015,pp 453-458 [16] Robert Bogdan Staszewski and Roman Staszewski Poras T. Balsara, “VHDL Simulation and Modeling of an All- Digital RF Transmitter”, Proceedings of the 9th International Database Engineering and Application Symposium ( IDEAS’05) IEEE 2005,pp110-116 [17] C. Siva Ram Murthy, B.S.Manoj, “Ad Hoc Wireless Networks Architecture and Protocols”, Pearson, pp 585- 639 [18] Amit Sharm, Kshitij Shinghal, Neelam Srivastava, Raghuvir Singh, “Energy Management for wireless sensor network odes”, International Journal of Advances in Engineering & Technology,Vol. 1, Mar 2011, ISSN: 2231- 1963, pp 7-13